APA
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Bermudez, J. P. R., Plana, L., Rowley, A., Hessel, M., Pedersen, J. E., Furber, S., & Conradt, J. (2023). A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-loop Real-Time Systems. International Conference on Neuromorphic Systems (ICONS).
Chicago/Turabian
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Bermudez, Juan Pablo Romero, L. Plana, Andrew Rowley, Mikael Hessel, Jens Egholm Pedersen, S. Furber, and J. Conradt. “A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-Loop Real-Time Systems.” International Conference on Neuromorphic Systems (ICONS) (2023).
MLA
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Bermudez, Juan Pablo Romero, et al. “A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-Loop Real-Time Systems.” International Conference on Neuromorphic Systems (ICONS), 2023.
BibTeX Click to copy
@article{juan2023a,
title = {A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-loop Real-Time Systems},
year = {2023},
journal = {International Conference on Neuromorphic Systems (ICONS)},
author = {Bermudez, Juan Pablo Romero and Plana, L. and Rowley, Andrew and Hessel, Mikael and Pedersen, Jens Egholm and Furber, S. and Conradt, J.}
}
The Spiking Neural Network Computer Architecture (SpiNNaker) is a massively parallel computing system. As one of the most widespread platforms in the emerging field of neuromorphic engineering, SpiNNaker targets three main areas of research: computational neuroscience, computer science, and robotics. For the latter, the promise of low power computation and the potential for large scale simulations in real-time make SpiNNaker very attractive, especially for autonomous mobile applications. In this context, research groups typically use SpiNNaker's Ethernet interface to inject and extract sensori-motor signals into and from SpiNNaker. However, in cases where the data throughput increases, the on-board Ethernet port constitutes a critical bottleneck. Some groups have overcome such a problem to some extent by developing their own I/O interfaces to connect external devices --- sensors and actuators --- directly to SpiNNaker. However, such custom-developed interfaces allow only limited general applications, and they don't fully exploit the high-speed FPGA-based interconnect offered by the 48-chip SpiNNaker boards. In this manuscript, we present SPIF: a general-purpose FPGA-based SpiNNaker Peripheral Interface board that overcomes SpiNNaker's communication bottleneck by connecting to its native High-Speed Serial Links (HSSLs). We evaluate SPIF's performance in terms of event throughput and latency. Finally, we demonstrate SPIF's capabilities by feeding events from a high-resolution event camera into a real-time spiking convolutional neural network. The system can track the position of a small and extremely fast but salient stimulus in the visual field with negligibly low latency.